Use of STM to Make Transistors Smaller and Better

A research association between the Nara Institute of Science and Technology and Osaka University for the very first time made use of scanning tunneling microscopy (STM) to make images of 3D silicon crystals that are atomically flat side surfaces. This research helps manufacturers of semiconductors to consistently innovate while manufacturing faster, smaller, and better energy efficient computer chips for smartphones and computers.

The present day microprocessors are manufactured by adding newer circuit patterns to the flat silicon wafers. A new way to integrated more number of transistors in the same area is to assemble 3D structures. FETs or the fin-type field effect transistors are called as such due they have the fin like structures of silicon that stretches into the air, off the face of the microprocessor chip. However, this newly developed method needs a crystal of silicon with a precisely flat side and top surfaces, instead of only flat top surface used in the current devices. The design of these next generation of chips will need fresh knowledge of the structures of atoms of the side surfaces.

Now, the scientists at the Nara Institute of Science and Technology and the Osaka University report that they used STM to mirror the side surface of a crystal of silicon. This activity was done for the first time. STM is strong technique that permits silicon atoms to be located individually. By moving an acute tip very near to the sample, the electron are able to jump across the void and produce an electrical flow or current. It is expected that this new found process will help in making transistors smaller and better with time.